Cryptology ePrint Archive: Report 2015/203
Achieving Side-Channel Protection with Dynamic Logic Reconfiguration on Modern FPGAs
Pascal Sasdrich and Amir Moradi and Oliver Mischke and Tim GŁneysu
Abstract: Reconfigurability is a unique feature of modern FPGA devices to load hardware circuits just on demand.
This also implies that a completely different set of circuits might operate at the exact same location of the FPGA at different time slots, making it difficult for an external observer or attacker to predict what will happen at what time.
In this work we present and evaluate a novel hardware implementation of the lightweight cipher PRESENT with built-in side-channel countermeasures based on dynamic logic reconfiguration. In our design we make use of Configurable Look-Up Tables (CFGLUT) integrated in modern Xilinx FPGAs to nearly instantaneously change hardware internals of our cipher implementation for improved resistance against side-channel attacks. We provide evidence from practical experiments based on a Spartan-6 platform that even with 10 million recorded power traces we were unable to detect a first-order leakage using the state-of-the-art leakage assessment.
Category / Keywords: implementation / side-channel protection, FPGA, masking, PRESENT
Original Publication (in the same form): HOST 2015
Date: received 5 Mar 2015
Contact author: pascal sasdrich at rub de
Available format(s): PDF | BibTeX Citation
Version: 20150306:132220 (All versions of this report)
Short URL: ia.cr/2015/203
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