We present comprehensive yet efficient implementations of ECC on fixed-point TMS54xx series of digital signal processors (DSP). 160-bit prime field GF(p) ECC is implemented over a wide range of coordinate choices. This paper also implements windowed recoding technique to provide better execution times. Stalls in the programming are mini-mized by utilization of loop unrolling and by avoiding data dependence. Complete scalar multiplication is achieved within 50 msec in coordinate implementations, which is further reduced till 25 msec for windowed-recoding method. These are the best known results for fixed-point low power digital signal processor to date.
Category / Keywords: implementation / Elliptic curve cryptosystem, implementation, digital signal processor (DSP), low power Date: received 15 Feb 2015 Contact author: yasir_alf at yahoo com Available format(s): PDF | BibTeX Citation Version: 20150224:023831 (All versions of this report) Short URL: ia.cr/2015/115 Discussion forum: Show discussion | Start new discussion