Cryptology ePrint Archive: Report 2015/1109

Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems

Bahram Rashidi, Sayed Masoud Sayedi, Reza Rezaeian Farashahi

Abstract: In this paper an efficient high-speed architecture of Gaussian normal basis multiplier over binary finite field GF(2m) is presented. The structure is constructed by using regular modules for computation of exponentiation by powers of 2 and low-cost blocks for multiplication by normal elements of the binary field. Since the exponents are powers of 2, the modules are implemented by some simple cyclic shifts in the normal basis representation. As a result, the multiplier has a simple structure with a low critical path delay. The efficiency of the proposed structure is studied in terms of area and time complexity by using its implementation on Vertix-4 FPGA family and also its ASIC design in 180nm CMOS technology. Comparison results with other structures of the Gaussian normal basis multiplier verify that the proposed architecture has better performance in terms of speed and hardware utilization.

Category / Keywords: implementation / Finite Fields, Elliptic Curve Cryptosystems, Multiplication, Gaussian normal basis, FPGA, ASIC.

Date: received 16 Nov 2015

Contact author: b_rashidi86 at yahoo com

Available format(s): PDF | BibTeX Citation

Version: 20151118:083122 (All versions of this report)

Short URL: ia.cr/2015/1109

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