Paper 2015/1109
Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over GF(2m) for Elliptic Curve Cryptosystems
Bahram Rashidi, Sayed Masoud Sayedi, and Reza Rezaeian Farashahi
Abstract
In this paper an efficient high-speed architecture of Gaussian normal basis multiplier over binary finite field GF(2m) is presented. The structure is constructed by using regular modules for computation of exponentiation by powers of 2 and low-cost blocks for multiplication by normal elements of the binary field. Since the exponents are powers of 2, the modules are implemented by some simple cyclic shifts in the normal basis representation. As a result, the multiplier has a simple structure with a low critical path delay. The efficiency of the proposed structure is studied in terms of area and time complexity by using its implementation on Vertix-4 FPGA family and also its ASIC design in 180nm CMOS technology. Comparison results with other structures of the Gaussian normal basis multiplier verify that the proposed architecture has better performance in terms of speed and hardware utilization.
Metadata
- Available format(s)
- Category
- Implementation
- Publication info
- Preprint. MINOR revision.
- Keywords
- Finite FieldsElliptic Curve CryptosystemsMultiplicationGaussian normal basisFPGAASIC.
- Contact author(s)
- b_rashidi86 @ yahoo com
- History
- 2015-11-18: received
- Short URL
- https://ia.cr/2015/1109
- License
-
CC BY
BibTeX
@misc{cryptoeprint:2015/1109, author = {Bahram Rashidi and Sayed Masoud Sayedi and Reza Rezaeian Farashahi}, title = {Efficient and Low-complexity Hardware Architecture of Gaussian Normal Basis Multiplication over {GF}(2m) for Elliptic Curve Cryptosystems}, howpublished = {Cryptology {ePrint} Archive, Paper 2015/1109}, year = {2015}, url = {https://eprint.iacr.org/2015/1109} }