Paper 2014/544

Secure Mutual Testing Strategy for Cryptographic SoCs

Amitabh Das, Dusko Karaklajic, and Ingrid Verbauwhede

Abstract

This article presents a secure mutual testing strategy for System-on-Chips (SoCs) that implement cryptographic functionalities. Such approach eliminates the need for an additional trusted component that is used to test security sensitive cores in a SoC, like symmetric and public-key cryptographic modules. We combine two test approaches: Logic Built In Self Test (BIST) and secure scan-chain based testing and develop a strategy that preserves the test quality of the standard test methods, enhancing security of the testing scheme. In order to minimize the area overhead of the presented solution, we re-use the existing modules in different manners: a public-key cryptographic core to build the BIST infrastructure and a symmetric one to authenticate a device under test to a test server, thus preventing an unauthorized user from accessing the test interface. By doing so, we achieve both testability and security at the minimal cost.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Preprint. MINOR revision.
Keywords
Secure TestingBISTScan-chainsTest WrapperCryptographic SoC
Contact author(s)
amitabh das @ esat kuleuven be
History
2014-07-18: received
Short URL
https://ia.cr/2014/544
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2014/544,
      author = {Amitabh Das and Dusko Karaklajic and Ingrid Verbauwhede},
      title = {Secure Mutual Testing Strategy for Cryptographic {SoCs}},
      howpublished = {Cryptology {ePrint} Archive, Paper 2014/544},
      year = {2014},
      url = {https://eprint.iacr.org/2014/544}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.