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Paper 2014/338

A Tamper and Leakage Resilient Random Access Machine

Sebastian Faust and Pratyay Mukherjee and Jesper Buus Nielsen and Daniele Venturi

Abstract

We present a ``universal'' Random Access Machine (RAM in short) for tamper and leakage resilient computation. The RAM has one CPU that accesses three storages (called disks in the following), two of them are secret, while the other one is public. The CPU has constant size for each fixed value of security parameter $k$. We construct a compiler for this architecture which transforms any keyed primitive into a RAM program where the key is encoded and stored on the two secret disks and the instructions for evaluating the functionality are stored on the public disk. The compiled program tolerates arbitrary independent tampering of the disks. That is, the adversary can tamper with the intermediate values produced by the CPU, and the program code of the compiled primitive on the public disk. In addition, it tolerates bounded independent leakage from the disks and continuous leakage from the communication channels between the disks and the CPU. Although it is required that the circuit of the CPU is tamper and leakage proof, its design is independent of the actual primitive being computed and its internal storage is non-persistent, i.e., all secret registers are reset between invocations. Hence, our result can be interpreted as reducing the problem of shielding arbitrary complex computations to protecting a single, simple and ``universal'' component. As a main ingredient of our construction we use continuous non-malleable codes that satisfy certain additional properties.

Metadata
Available format(s)
PDF
Publication info
Preprint. MINOR revision.
Keywords
tamper resistancenon-malleable codes
Contact author(s)
danone83 @ gmail com
History
2015-02-19: last of 5 revisions
2014-05-15: received
See all versions
Short URL
https://ia.cr/2014/338
License
Creative Commons Attribution
CC BY
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