In this paper, we present the first large-scale security analysis of ASIC implementations of the five most popular intrinsic electronic PUF types, including arbiter, ring oscillator, SRAM, flip-flop and latch PUFs. Our analysis is based on PUF data obtained at different operating conditions from $96$ ASICs housing multiple PUF instances, which have been manufactured in TSMC 65nm CMOS technology. In this context, we present an evaluation methodology and quantify the robustness and unpredictability properties of PUFs. Since all PUFs have been implemented in the same ASIC and analyzed with the same evaluation methodology, our results allow for the first time a fair comparison of their properties.
Category / Keywords: implementation / Physically Unclonable Functions (PUFs), ASIC implementation, evaluation framework, unpredictability, robustness Publication Info: A shorter version of this paper has been published at CHES 2012. Date: received 27 Sep 2012 Contact author: christian wachsmann at trust cased de Available format(s): PDF | BibTeX Citation Version: 20120930:002137 (All versions of this report) Short URL: ia.cr/2012/557 Discussion forum: Show discussion | Start new discussion