After exploring and comparing different cage construction strategies (and reporting preliminary implementation results on silicon), we introduce a "hardware canary". The canary is a spatially distributed chain of functions $F_i$ positioned at the vertices of a 3D cage surrounding a protected circuit. A correct answer $(F_n \circ \ldots \circ F_1)(m)$ to a challenge $m$ attests the canary's integrity.
Category / Keywords: applications / IC protection, MAC, active shields, Hamiltonian cycle Date: received 8 Jun 2012 Contact author: cioranesco at hotmail fr Available formats: PDF | BibTeX Citation Version: 20120612:035613 (All versions of this report) Discussion forum: Show discussion | Start new discussion