An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture

Simon Hoerder; Marcin Wojcik; Stefan Tillich; Dan Page

Paper 2010/614

An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture

Simon Hoerder, Marcin Wojcik, Stefan Tillich, and Dan Page

Abstract

Cryptographic hash functions are an omnipresent components in security-critical software and devices; they support, for example, digital signature and data authenticity schemes, mechanisms for key derivation, pseudo-random number generation and so on. A criteria for candidate hash functions in the SHA-3 contest is resistance against side-channel analysis which is a major concern for mobile devices as well. This paper explores the implementation of said candidates on a variant of the Power-Trust platform; our results highlight this representing a flexible solution to power analysis attacks, implying only a modest performance overhead.

Metadata

Available format(s): PDF
Category: Implementation
Publication info: Published elsewhere. Unknown where it was published
Keywords: message authentication codes hash functions smart cards
Contact author(s): hoerder @ compsci bristol ac uk
History: 2010-12-02: received
Short URL: https://ia.cr/2010/614
License: CC BY

BibTeX

@misc{cryptoeprint:2010/614,
      author = {Simon Hoerder and Marcin Wojcik and Stefan Tillich and Dan Page},
      title = {An Evaluation of Hash Functions on a Power Analysis Resistant Processor Architecture},
      howpublished = {Cryptology {ePrint} Archive, Paper 2010/614},
      year = {2010},
      url = {https://eprint.iacr.org/2010/614}
}