Secure Adiabatic Logic: a Low-Energy DPA-Resistant Logic Style

Mehrdad Khatir; Amir Moradi

Paper 2008/123

Secure Adiabatic Logic: a Low-Energy DPA-Resistant Logic Style

Mehrdad Khatir and Amir Moradi

Abstract

The charge recovery logic families have been designed several years ago not in order to eliminate the side-channel leakage but to reduce the power consumption. However, in this article we present a new charge recovery logic style not only to gain high energy efficiency but also to achieve the resistance against side-channel attacks (SDA) especially against differential power analysis (DPA) attacks. Simulation results show a significant improvement in DPA-resistance level as well as in power consumption reduction in comparison with DPA-resistant logic styles proposed so far.

Metadata

Available format(s): PDF
Publication info: Published elsewhere. Unknown where it was published
Keywords: DPA DPA-Resistance Cell Level Countermeasure SAL
Contact author(s): moradi @ crypto rub de
History: 2008-03-17: received
Short URL: https://ia.cr/2008/123
License: CC BY

BibTeX

@misc{cryptoeprint:2008/123,
      author = {Mehrdad Khatir and Amir Moradi},
      title = {Secure Adiabatic Logic: a Low-Energy {DPA}-Resistant Logic Style},
      howpublished = {Cryptology {ePrint} Archive, Paper 2008/123},
      year = {2008},
      url = {https://eprint.iacr.org/2008/123}
}