Cryptology ePrint Archive: Report 2006/316
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
Sarang Aravamuthan and Viswanatha Rao Thumparthy
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further parallelism is achieved by executing a portion of the multiprecision arithmetic operations in parallel with point multiplication. This results in a saving in timing as well as gate count when the two paths are implemented in hardware and software. This article attempts to exploit this parallelism in a typical system context in which a microprocessor is always present though a hardware accelerator is being designed for performance. We discuss some implementation aspects of this design with reference to power analysis attacks. We show how the Montgomery point multiplication and the binary extended gcd algorithms can be adapted to prevent simple power analysis attacks.
We implemented our design using a hardware/software parallel architecture. We present the results when the software component is coded on an 8051 architecture and an ARM7TDMI processor.
Category / Keywords: implementation / digital signatures, elliptic curve cryptosystem, implementation
Date: received 14 Sep 2006, last revised 22 Sep 2006
Contact author: sarang at atc tcs co in
Available format(s): PDF | BibTeX Citation
Note: While the paper has focused on ECDSA, the same principle also applies to the more general Digital Signature Algorithm.
Version: 20060922:143843 (All versions of this report)
Short URL: ia.cr/2006/316
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