Cryptology ePrint Archive: Report 2005/413

VEST Hardware-Dedicated Stream Ciphers

Sean O'Neil and Benjamin Gittins and Howard A. Landman

Abstract: VEST ciphers are based on bijective non-linear parallel feedback shift registers assisted by non-linear Residue Number System (RNS) based counters. Four VEST cipher family trees are introduced: 80-bit secure VEST-4, 128-bit secure VEST-8, 160-bit secure VEST-16 and 256-bit secure VEST-32. VEST ciphers return 4 to 32 bits of output per clock cycle while occupying ~5K to ~22K ASIC gates including the finite state machine logic overhead. All VEST ciphers support family keying, variable key sizes and instant re-keying. VEST ciphers are designed exploiting all the advantages of ASIC and FPGA hardware offering high-speed encryption with very low latency and substantial performance improvements comparing with general-purpose or software ciphers implemented in the same area.

Category / Keywords: secret-key cryptography / stream ciphers, hash functions, authenticated encryption, message digest, MAC, message authentication code, fastest hardware cipher, NLFSR, parallel feedback, RNS, residue number system

Publication Info: posted on ECRYPT, not published previously

Date: received 17 Nov 2005, last revised 21 Nov 2005, withdrawn 3 Apr 2007

Contact author: sean at cryptolib com

Available format(s): (-- withdrawn --)

Version: 20070404:075102 (All versions of this report)

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