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Paper 2004/198

Long Modular Multiplication for Cryptographic Applications

Laszlo Hars

Abstract

A digit-serial, multiplier-accumulator based cryptographic co-processor architecture is proposed, similar to fix-point DSP's with enhancements, supporting long modular arithmetic and general computations. Several new “column-sum” variants of popular quadratic time modular multiplication algorithms are presented (Montgomery and interleaved division-reduction with or without Quisquater scaling), which are faster than the traditional implemen-tations, need no or very little memory beyond the operand storage and perform squaring about twice faster than general multiplications or modular reductions. They provide similar advantages in software for general purpose CPU's.

Note: See also at http://www.hars.us/Papers/ModMult.pdf

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. CHES 2004 (Publisher damaged the copy in the proceedings LNCS 3156)
Keywords
Computer ArithmeticModular multiplicationModular reductionMontgomery multiplicationQuisquater multiplicationMultiply-accumulate architectureReciprocal
Contact author(s)
Laszlo @ Hars US
History
2004-08-15: received
Short URL
https://ia.cr/2004/198
License
Creative Commons Attribution
CC BY
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